The Fetch-Execute cycle

Overview

Recall questions on the fetch, decode and execute stages, the register used at each step, register transfer notation, and what changes when a branch is taken.

What you need to know

Answer each one before you reveal it.

Questions from this subtopic

Each one with the model answer underneath.

1. 1

   Name the three stages of the Fetch-Execute cycle and say in one line what each does.

   Model answer

   Fetch: the next instruction is copied from main memory into the processor. Decode: the control unit works out from the opcode what operation is required and in which addressing mode. Execute: the operation is carried out. The cycle then repeats, continuously, for as long as the processor is running.

2. 2

   Describe the fetch stage in full, naming the register used at each step.

   Model answer

   First, the contents of the program counter, the address of the next instruction, are copied into the memory address register. Second, the program counter is incremented by one so that it now points at the following instruction. Third, the address in the memory address register is placed on the address bus and the control unit asserts the read line on the control bus, so main memory returns the contents of that location along the data bus into the memory buffer register. Fourth, the contents of the memory buffer register are copied into the current instruction register. The instruction is now inside the processor and ready to be decoded.

3. 3

   Write the fetch stage in register transfer form.

   Model answer

   MAR takes the contents of PC. PC takes the contents of PC plus 1. MBR takes the contents of the memory location addressed by MAR. CIR takes the contents of MBR. Written with square brackets meaning 'the contents of': [MAR] gets [PC]; [PC] gets [PC] + 1; [MBR] gets [memory addressed by MAR]; [CIR] gets [MBR].

4. 4

   Why is the program counter incremented so early in the cycle, before the instruction has even been decoded?

   Model answer

   Because the address it held has already been safely copied into the memory address register, so the program counter is free, and incrementing it at once means it is already correct by the time execution begins. That matters because a branch instruction executed later in this same cycle will overwrite the program counter, and incrementing after that would destroy the branch. It also means an instruction that needs to save a return address, such as a subroutine call, finds the address of the following instruction already sitting in the program counter.

5. 5

   Describe the decode stage.

   Model answer

   The control unit examines the instruction now held in the current instruction register. It splits it into the opcode and the operand, and decodes the opcode to determine which basic machine operation is required, for example add or store, and which addressing mode is to be used, immediate or direct. Knowing this, the control unit determines what sequence of control signals will be needed and where the operand is to come from. Nothing is carried out yet.

6. 6

   Describe the execute stage.

   Model answer

   The control unit issues the control signals that carry out the decoded instruction. What happens depends on the instruction. If the operand is an immediate value it is taken straight from the current instruction register. If direct addressing is used, the operand field is copied into the memory address register and a further memory read brings the datum into the memory buffer register. Arithmetic and logical operations are passed to the arithmetic logic unit, which produces a result in a register and sets the flags in the status register. A store instruction puts the value in the memory buffer register and the address in the memory address register and signals a write. A branch instruction changes the program counter. When the instruction is complete the cycle begins again.

Other ways to work this

The same content, four other ways.

What is inside Levo

Six ways to work the same material.