OCR A-Level Computer Science H446
Processors: Structure, Performance and Types
Input, Output and Storage
Systems Software
Applications Generation
Software Development
Types of Programming Language
Exchanging Data
Networks
Web Technologies
Data Types and Number Representation
Data Structures
Boolean Algebra
Legal, Moral, Cultural and Ethical Issues
Elements of Computational Thinking
Problem Solving and Programming
Algorithms
Boolean Algebra
Half Adders, Full Adders and D-type Flip Flops
- 3 things to know
- Component 01
Overview
Recall questions on half adders and full adders with their truth tables, expressions and gate arrangements, ripple carry adders and propagation delay, tracing a four-bit addition, and D-type flip flops, edge triggering, toggling and their uses.
What you need to know
Answer each one before you reveal it.
Describe how a full adder can be built from two half adders.
Explain the difference between an adder and a flip flop as types of logic circuit.
Questions from this subtopic
Each one with the model answer underneath.
- 1
What is a half adder for?
Model answer
It adds two single binary digits together. It has two inputs, the bits A and B being added, and two outputs: the sum bit S and the carry bit C. It is the basic building block for binary addition in the arithmetic logic unit.
- 2
Give the truth table for a half adder.
Model answer
Inputs A and B, outputs sum S and carry C. A=0, B=0 gives S=0, C=0. A=0, B=1 gives S=1, C=0. A=1, B=0 gives S=1, C=0. A=1, B=1 gives S=0, C=1, because 1 + 1 in binary is 10, so the sum digit is 0 and 1 is carried.
- 3
Describe the gate arrangement of a half adder.
Model answer
The two inputs A and B each split at a junction and feed two gates in parallel. Both go into an XOR gate whose output is the sum S, and both also go into an AND gate whose output is the carry C. That is the whole circuit: two gates, two inputs, two outputs. XOR gives the sum because the sum bit is 1 exactly when the inputs differ, and AND gives the carry because a carry is produced only when both inputs are 1.
- 4
What is the limitation of a half adder?
Model answer
It has no input for a carry coming in from a previous column. It can therefore only ever add the two least significant bits of a pair of numbers; for any higher column there may be a carry from the column to the right, and the half adder has nowhere to accept it. That is why half adders cannot be chained to add multi-bit numbers.
- 5
What is a full adder, and what are its inputs and outputs?
Model answer
A full adder adds three single bits: the two bits being added, A and B, and a carry-in, Cin, from the previous column. It has two outputs, the sum bit S and the carry-out Cout, which is passed on to the next column. The three inputs are what distinguish it from a half adder.
- 6
Give the truth table for a full adder.
Model answer
With inputs A, B, Cin and outputs S and Cout: 0,0,0 gives S=0, Cout=0. 0,0,1 gives S=1, Cout=0. 0,1,0 gives S=1, Cout=0. 0,1,1 gives S=0, Cout=1. 1,0,0 gives S=1, Cout=0. 1,0,1 gives S=0, Cout=1. 1,1,0 gives S=0, Cout=1. 1,1,1 gives S=1, Cout=1. Read as arithmetic, the sum bit is 1 when an odd number of the three inputs is 1, and the carry-out is 1 when two or more of them are 1.
Other ways to work this
The same content, four other ways.
What is inside Levo
Six ways to work the same material.
Every question in Boolean Algebra, on a schedule.
Attempt a question from memory, write the correct version, then attempt it again. Levo records the jump between your first attempt and your last, and brings each question back on the day you are due to forget it.
Or £46 a year, about £3.83 a month. Cancel anytime.