Von Neumann, Harvard and contemporary architecture

Overview

Recall questions on von Neumann architecture and its bottleneck, Harvard architecture, where each is used, modified Harvard architecture, the features of contemporary processors, and why Harvard does not make von Neumann obsolete.

What you need to know

Answer each one before you reveal it.

Questions from this subtopic

Each one with the model answer underneath.

1. 1

   What defines von Neumann architecture?

   Model answer

   A single memory that holds both the program instructions and the data, addressed in exactly the same way, reached through one shared set of buses, with a single control unit fetching and executing one instruction at a time. This is the stored program concept: the program lives in the same memory as the data it works on.

2. 2

   Give the main advantage and the main weakness of von Neumann architecture.

   Model answer

   The advantage is simplicity and flexibility. One memory and one set of buses is cheaper and simpler to build, memory can be divided between program and data in whatever proportion a particular program needs, and because instructions are stored just like data, programs can be loaded, moved and generated by other programs, which is what makes operating systems, loaders and compilers possible. The weakness is the von Neumann bottleneck: instructions and data share one bus, so the processor cannot fetch an instruction and read a data item in the same cycle and spends a great deal of time waiting on memory.

3. 3

   What is Harvard architecture?

   Model answer

   An architecture with physically separate memories for instructions and for data, each with its own bus connecting it to the processor, so an instruction and a data item can be accessed at the same instant.

4. 4

   What are the consequences, good and bad, of separating instruction and data memory?

   Model answer

   Good: an instruction fetch and a data access can happen simultaneously, raising throughput and, importantly for control systems, making the timing of a program highly predictable. The two memories can also use different technologies and different word widths, so a fixed program can sit in ROM or flash while data uses RAM. Bad: two memories and two sets of buses cost more, need more connections on the chip and add complexity. Memory cannot be reallocated between code and data, so spare instruction memory is useless if you run out of data memory. And a program stored in a separate instruction memory is much harder to modify or generate at run time.

5. 5

   Where would you actually find each architecture in use?

   Model answer

   Von Neumann underpins general-purpose computers, so desktops, laptops and servers, where the machine must run arbitrary programs of unknown size and flexibility matters more than raw memory throughput. Harvard is used in microcontrollers and embedded controllers, in things like washing machines, car engine management units and cameras, and in digital signal processors, where the program is fixed, the memory budget is tight and predictable timing and speed matter most.

6. 6

   What is a modified Harvard architecture, and why is it what most modern processors really use?

   Model answer

   It keeps a single unified main memory in the von Neumann style, but places a separate L1 instruction cache and L1 data cache close to the core with separate paths into it. The processor can therefore fetch an instruction and a data item in the same cycle at the cache level, gaining the Harvard speed advantage where it matters, while main memory stays a single flexible pool that can be divided between code and data as needed. It is a deliberate compromise between the two classical models.

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