Processors: Structure, Performance and Types

What Processors: Structure, Performance and Types covers

Processors: Structure, Performance and Types is examined on component 01 of OCR Computer Science, Computer systems. 91 recall questions across 7 subtopics.

The 7 subtopics

Each one has its own page.

• Inside the CPU: ALU, control unit, registers and busesRecall questions on the arithmetic and logic unit, the control unit, the program counter, MAR, MDR, CIR and accumulator, the address, data and control buses, how bus width sets addressable memory and transfer size, and how assembly language relates to the registers.Open →
• The fetch-decode-execute cycleRecall questions on the fetch, decode and execute stages, how each register changes during a store, add or jump instruction, conditional and unconditional jumps, which bus carries the instruction, and why the program counter is incremented during the fetch.Open →
• What makes a CPU fast: clock speed, cores and cacheRecall questions on clock speed and cycle time, why doubling clock speed or adding cores does not double performance, cache hits and misses, L1, L2 and L3 cache, heat, and how clock speed, cores and cache interact.Open →
• PipeliningRecall questions on pipelining in a processor, throughput once the pipeline is full, counting clock cycles with and without pipelining, jumps and branch prediction, data dependencies that stall a pipeline, and why RISC pipelines well.Open →
• Von Neumann, Harvard and contemporary architectureRecall questions on von Neumann architecture and its bottleneck, Harvard architecture, where each is used, modified Harvard architecture, the features of contemporary processors, and why Harvard does not make von Neumann obsolete.Open →
• CISC and RISCRecall questions on CISC and RISC design ideas, instruction length and cycles per instruction, register use and load and store, the burden on the compiler, program length, power use, pipelining, and the typical uses of each.Open →
• GPUs, multicore and parallel systemsRecall questions on GPUs and why graphics suits massively parallel cores, non-graphics uses of GPUs, when a GPU is the wrong choice, multicore and parallel systems, problems that parallelise, shared data, and why manufacturers added cores.Open →

What you need to know

Answer each one before you reveal it.

Take Processors: Structure, Performance and Types further

The same content, four other ways.

Commonly confused

Pairs that lose marks when they are blurred together.

• A cache hit vs A cache miss

  A cache hit: the case where the data the processor asked for is already in the fast local memory. A cache miss: the case where the data must be fetched from main memory, costing many more cycles.

• Harvard architecture vs Von Neumann architecture

  Harvard architecture: a design with separate memories and buses for instructions and for data. Von Neumann architecture: a design in which instructions and data share one memory and one bus.

• Pipelining vs A multicore system

  Pipelining: overlapping the stages of successive instructions so that several are in progress at once. A multicore system: a processor carrying more than one independent execution unit on the same chip.

Questions from this topic

Each one with the model answer underneath.

1. 1

   What are the three main parts of a processor, and what does each one do?

   Model answer

   The arithmetic and logic unit (ALU) carries out every calculation and logical operation. The control unit (CU) fetches and decodes instructions and coordinates everything else, sending out the control signals that make the other components act. The registers are a small number of extremely fast storage locations inside the processor itself, holding the addresses, instructions and data the CPU is working on at this instant.

2. 2

   Which operations does the ALU actually perform?

   Model answer

   Arithmetic: addition and subtraction, and multiplication and division built from repeated addition and binary shifts. Logic: AND, OR, NOT and XOR applied bit by bit. Comparisons, which are usually performed as a subtraction and set flags such as zero, negative, carry and overflow. It also performs the binary shifts themselves. The result of an ALU operation is normally placed in the accumulator.

3. 3

   The control unit does not calculate anything, so what is it actually for?

   Model answer

   It decodes the opcode of the current instruction and works out what has to happen. It then generates the control signals that tell each component what to do and when: read from memory, write to memory, use the ALU, move a value between registers. It uses the pulses of the system clock to synchronise the timing of every step, and it directs the flow of data along the buses. In short, it manages the fetch-decode-execute cycle.

4. 4

   Why does a processor need registers at all when it already has main memory?

   Model answer

   Registers sit inside the processor and can be read or written within a single clock cycle, whereas a main memory access takes many cycles and has to cross the buses. Without registers the CPU would spend nearly all its time waiting. Registers are very few and very small because they are expensive in chip area, so they hold only the handful of values in immediate use.

5. 5

   What does the program counter hold?

   Model answer

   The memory address of the next instruction to be fetched. It is copied into the memory address register at the start of each fetch and then incremented, so by default the processor works through memory in order. A jump instruction overwrites it with a different address, which is how the flow of a program is changed.

6. 6

   Explain the purpose of the memory address register.

   Model answer

   The MAR holds the address of the memory location that is about to be read from or written to. Its contents are placed onto the address bus so that the memory hardware can select the right location. It holds an address only, never the value stored there.

What is inside Levo

Six ways to work the same material.

Processors: Structure, Performance and Types revision questions

What does Processors: Structure, Performance and Types cover in OCR A-Level Computer Science?

7 subtopics: inside the cpu: alu, control unit, registers and buses, the fetch-decode-execute cycle, what makes a cpu fast: clock speed, cores and cache, pipelining, von neumann, harvard and contemporary architecture, cisc and risc and gpus, multicore and parallel systems. Each one has its own page with questions and model answers.

How is Processors: Structure, Performance and Types organised?

By the OCR H446 specification, subtopic by subtopic, so it matches the order you are taught it in.