CISC and RISC

Overview

Recall questions on CISC and RISC design ideas, instruction length and cycles per instruction, register use and load and store, the burden on the compiler, program length, power use, pipelining, and the typical uses of each.

What you need to know

Answer each one before you reveal it.

Questions from this subtopic

Each one with the model answer underneath.

1. 1

   What does CISC stand for, and what is the design idea behind it?

   Model answer

   Complex Instruction Set Computer. The idea is to provide a large set of powerful instructions, each capable of carrying out a multi-step job in one go, for example fetching two operands from memory, multiplying them and storing the result. A task therefore needs relatively few instructions, and the complexity lives in the processor hardware, often implemented in microcode inside the chip.

2. 2

   What does RISC stand for, and how does its design idea differ?

   Model answer

   Reduced Instruction Set Computer. It provides a small set of simple instructions, each doing one straightforward thing and designed to complete in a single clock cycle. Anything complicated must be built up from several of these, so the complexity moves out of the hardware and into the compiler and the software.

3. 3

   Compare CISC and RISC on instruction length and on cycles per instruction.

   Model answer

   CISC instructions vary in length, because a complex instruction with memory operands needs more bits than a simple one, and they typically take several clock cycles each. RISC instructions are all a fixed length, which makes them quick and simple to decode, and each is intended to take one cycle, or one cycle per pipeline stage.

4. 4

   How does register use differ between the two?

   Model answer

   RISC has many general purpose registers and uses a load and store architecture: only the load and store instructions touch memory at all, and every arithmetic or logical operation works on values already in registers. CISC has fewer registers, and its instructions can often operate directly on operands held in memory. The RISC approach keeps working values in fast registers and makes each memory access explicit; the CISC approach hides the memory access inside the instruction.

5. 5

   Which design puts more burden on the compiler, and why?

   Model answer

   RISC. The compiler must translate each high-level statement into a longer sequence of simple instructions, and because RISC relies on keeping values in its many registers it must also decide cleverly which values live in which register and when they are spilled to memory. A CISC compiler can often map a whole statement onto a single instruction, which is easier, though selecting the best instruction from a very large and irregular set brings its own difficulty.

6. 6

   Which produces the longer program, and why does that matter?

   Model answer

   RISC does: more instructions are needed for the same task, so the machine code is larger. That means more memory occupied by the program, more instruction fetches and therefore more demand on memory bandwidth, and more pressure on the instruction cache. CISC code is denser, which mattered a great deal when memory was scarce and expensive and still matters for code that must fit in a small cache or a small embedded device.

Other ways to work this

The same content, four other ways.

What is inside Levo

Six ways to work the same material.