Process
WJEC AS-Level Computer Science 601-5345-3
Hardware: Architecture, Memory and Storage
Networks and Data Transmission
Logic Gates and Boolean Algebra
Data Representation and Data Types
Data Structures
Organisation of Data: Files and Records
Database Systems
The Operating System
Algorithms and Programs
Principles of Programming
Systems Analysis
Software Engineering and Program Construction
Topic overviewIntegrated development environments and their purposeEditors, syntax highlighting and code entry toolsDebugging tools: breakpoints, stepping and watchesTranslation, source code and object codeLexical analysis and the symbol tableSyntax and semantic analysisCode generation and optimisation
Types of Software System
Practical Programming
Data Security and Integrity
Computing, Society and the Law
Topic overviewSocial and economic change from computingComputers and the nature of employmentThe digital divide and cultural changeEnvironmental cost of computingData protection and freedom of information lawThe Computer Misuse Act 1990 and computer crimeCopyright, surveillance and professional codes
Hardware: Architecture, Memory and Storage
- 7 subtopics
- 21 things to know
- AS Unit 1
What Hardware: Architecture, Memory and Storage covers
Hardware: Architecture, Memory and Storage is examined in AS Unit 1, Fundamentals of Computer Science. It covers components of a computer system and how they connect, Von Neumann architecture and the CPU, the fetch-execute cycle, memory and caching, parallel processing, input and output devices and their uses and secondary storage, fragmentation and defragmentation.
Where it is assessed
AS Unit 1
Fundamentals of Computer Science, examined again at A2 at a more demanding level.
Check the WJEC specification ↗The 7 subtopics
Each one has its own page. WJEC AS Computer Science students sit this topic in the first year.
- Components of a computer system and how they connectFour broad functions that any computer system performs on data, three buses that connect the processor to main memory and three signals that travel along the control bus.Open →
- Von Neumann architecture and the CPUStored program concept, held in the program counter and purpose of the memory address register.Open →
- The fetch-execute cycleThree stages of the fetch-execute cycle in order and purpose of the system clock.Open →
- Memory and cachingTypically held in a computer's ROM, static RAM and dynamic RAM and levels of the memory hierarchy from fastest to slowest.Open →
- Parallel processingParallel processing, multi-core processor and single instruction, multiple data arrangement.Open →
- Input and output devices and their usesRecall questions on barcode and RFID, optical mark against optical character recognition, capacitive and resistive touchscreens, sensors and actuators, why an analogue-to-digital converter is needed, and choosing a device for a cash machine, a delivery round or a user who cannot use their hands.Open →
- Secondary storage, fragmentation and defragmentationTrack, sector and cylinder on a hard disc and consequences of heavy fragmentation on a magnetic hard disc.Open →
What you need to know
Answer each one before you reveal it.
Your recallNot started
Process
Describe, in order, what happens during the fetch stage.
Key term
Why is an analogue-to-digital converter needed between a sensor and a computer?
Key term
Define track, sector and cylinder on a hard disc.
Key term
What are the four broad functions that any computer system performs on data?
Key term
What distinguishes RAM from ROM?
Key term
Describe a single instruction, multiple data arrangement.
Process
Name the three buses that connect the processor to main memory.
Key term
Explain the stored program concept.
Process
State the three stages of the fetch-execute cycle in order.
Key term
What is typically held in a computer's ROM?
Key term
How does a computing cluster differ from a multi-core chip?
Key term
Distinguish between an input device and an output device.
Key term
Why does a computer need secondary storage when it already has main memory?
Key term
Why is the address bus unidirectional while the data bus is bidirectional?
Key term
What is held in the program counter?
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Which bus carries the contents of the memory address register?
Key term
Which of static and dynamic RAM is used for cache, and which for main memory?
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Why must access to shared data be controlled when several cores run at once?
Key term
Give two reasons a warehouse might tag its stock with RFID rather than barcodes.
Key term
How does a magnetic hard disc store a single bit?
Take Hardware: Architecture, Memory and Storage further
The same content, four other ways.
Commonly confused
Pairs that lose marks when they are blurred together.
A cache hit vs A cache miss
A cache hit: the wanted item was already close to the processor and is supplied at once. A cache miss: it means the item must be brought in from much slower storage and a block replaced.
Questions from this topic
Each one with the model answer underneath.
- 1
What are the four broad functions that any computer system performs on data?
Model answer
Input, processing, storage and output.
- 2
Name the three buses that connect the processor to main memory.
Model answer
The address bus, the data bus and the control bus.
- 3
Why is the address bus unidirectional while the data bus is bidirectional?
Model answer
Addresses are only ever sent out by the processor to select a location, whereas data must travel both from memory into the processor on a read and out to memory on a write.
- 4
A machine has a 32-bit address bus. How many separate memory locations can it select, and how is that figure reached?
Model answer
It can select 2³² = 4,294,967,296 locations, because each of the 32 lines independently carries a 0 or a 1.
- 5
What determines how many bits can be moved between processor and memory in a single transfer?
Model answer
The width of the data bus, that is the number of parallel lines it carries.
- 6
Name three signals that travel along the control bus.
Model answer
A read or write signal, the clock pulse, and an interrupt request.
What is inside Levo
Six ways to work the same material.
Hardware: Architecture, Memory and Storage revision questions
- Is Hardware: Architecture, Memory and Storage examined at AS in WJEC Computer Science?
- Yes. It sits in AS Unit 1, which you take in the first year, so it is on the AS paper as well as counting towards the full A level.
- What does Hardware: Architecture, Memory and Storage cover in WJEC AS-Level Computer Science?
- 7 subtopics: components of a computer system and how they connect, von neumann architecture and the cpu, the fetch-execute cycle, memory and caching, parallel processing, input and output devices and their uses and secondary storage, fragmentation and defragmentation. Each one has its own page with questions and model answers.
- How is Hardware: Architecture, Memory and Storage organised?
- By the WJEC 601-5345-3 specification, subtopic by subtopic, so it matches the order you are taught it in.
Every question in Hardware: Architecture, Memory and Storage, on a schedule.
Attempt a question from memory, write the correct version, then attempt it again. Levo records the jump between your first attempt and your last, and brings each question back on the day you are due to forget it.
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