Eduqas A-Level Computer Science A500QS
Data Structures: Arrays, Records and Hash Tables
Stacks, Queues, Linked Lists and Trees
Boolean Logic and Simplification
Algorithms, Pseudo-Code and Programming Constructs
Variables, Scope, Parameters and Identifiers
Recursion and Modular Programming
Sorting Algorithms
Searching and Shortest-Path Algorithms
Big O Notation and Algorithm Efficiency
Validation, Verification and Testing
Data Compression
Programming Paradigms and Computer Languages
Systems Analysis, Maintenance and Documentation
System Design and Human-Computer Interaction
Software Engineering Tools and Translators
Computing, Society and the Law
Computer Architecture, the Processor and Assembly Language
Input, Output and Secondary Storage
Networks, Protocols and the Internet
Data Transmission and Network Performance
Number Systems and Binary Arithmetic
Data Types, Characters and Floating Point
Files, Records and File Organisation
Databases, Normalisation and Entity Modelling
SQL, Big Data and Distributed Systems
The Operating System and Its Modes
Interrupts, Memory Management and Scheduling
Types of Software System
Data Security, Cryptography and Attack
Computer Architecture, the Processor and Assembly Language
Von Neumann architecture and the stored program concept
- 3 things to know
- Component 2
Overview
Stored program concept, von Neumann bottleneck and modified Harvard architecture.
What you need to know
Answer each one before you reveal it.
Which features define Von Neumann architecture?
What is the Von Neumann bottleneck?
Questions from this subtopic
Each one with the model answer underneath.
- 1
What is meant by the stored program concept?
Model answer
The stored program concept means instructions and data are both held in main memory. The processor fetches each instruction from memory in turn.
- 2
Which features define Von Neumann architecture?
Model answer
Von Neumann architecture uses one memory for instructions and data, one control unit, and instructions executed in sequence. A single shared bus carries both instructions and data.
- 3
What is the Von Neumann bottleneck?
Model answer
The Von Neumann bottleneck is the limit imposed by one shared bus between processor and memory. The processor sits idle while waiting for instructions or data to arrive.
- 4
How does Harvard architecture differ from Von Neumann architecture?
Model answer
Harvard architecture keeps instructions and data in separate memories with separate buses. An instruction and a data item can therefore be fetched at the same time.
- 5
Where is Harvard architecture typically used, and why?
Model answer
Harvard architecture is common in digital signal processors and microcontrollers. Predictable timing and simultaneous fetches matter more there than flexible use of memory.
- 6
What is a modified Harvard architecture?
Model answer
A modified Harvard architecture uses split instruction and data caches over a single main memory. The processor gains parallel fetching without needing two physically separate memories.
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