Eduqas A-Level Computer Science A500QS
Data Structures: Arrays, Records and Hash Tables
Stacks, Queues, Linked Lists and Trees
Boolean Logic and Simplification
Algorithms, Pseudo-Code and Programming Constructs
Variables, Scope, Parameters and Identifiers
Recursion and Modular Programming
Sorting Algorithms
Searching and Shortest-Path Algorithms
Big O Notation and Algorithm Efficiency
Validation, Verification and Testing
Data Compression
Programming Paradigms and Computer Languages
Systems Analysis, Maintenance and Documentation
System Design and Human-Computer Interaction
Software Engineering Tools and Translators
Computing, Society and the Law
Computer Architecture, the Processor and Assembly Language
Input, Output and Secondary Storage
Networks, Protocols and the Internet
Data Transmission and Network Performance
Number Systems and Binary Arithmetic
Data Types, Characters and Floating Point
Files, Records and File Organisation
Databases, Normalisation and Entity Modelling
SQL, Big Data and Distributed Systems
The Operating System and Its Modes
Interrupts, Memory Management and Scheduling
Types of Software System
Data Security, Cryptography and Attack
Interrupts, Memory Management and Scheduling
- 8 subtopics
- 24 things to know
- Component 2
What Interrupts, Memory Management and Scheduling covers
Interrupts, Memory Management and Scheduling is examined in Component 2, Computer Architecture, Data, Communication and Applications. It covers what causes an interrupt, interrupt handling and the interrupt service routine, interrupt priorities and how they are allocated, partitioning main memory, methods of data transfer between processor and devices, buffers and double buffering, high level scheduling, processor and device allocation and process states, time-slicing, polling and threading.
Where it is assessed
Component 2
Computer Architecture, Data, Communication and Applications.
Check the Eduqas specification ↗The 8 subtopics
Each one has its own page.
- What causes an interruptFour broad categories of interrupt, hardware failure interrupt and interrupt does a user pressing a key generate.Open →
- Interrupt handling and the interrupt service routineWhat happens immediately after the processor accepts an interrupt, interrupt service routine and interrupt vector.Open →
- Interrupt priorities and how they are allocatedThree factors that decide the priority given to an interrupt, non-maskable interrupt and danger of giving every interrupt the same priority.Open →
- Partitioning main memoryPartitioning main memory, difference between fixed and variable partitioning and internal fragmentation in a partitioned main memory.Open →
- Methods of data transfer between processor and devicesProgrammed input and output, interrupt-driven data transfer and direct memory access.Open →
- Buffers and double bufferingHow a buffer is used when reading from a disc, double buffering and buffer underrun.Open →
- High level scheduling, processor and device allocationHigh level scheduling, three aims of a scheduler and job priority.Open →
- Process states, time-slicing, polling and threadingRunning, ready and blocked, what moves a process between them, and how time-slicing, polling and threads share one processor between many processes.Open →
What you need to know
Answer each one before you reveal it.
What puts a process into the blocked state, and what does the scheduler then do?
What is an interrupt?
When in the fetch-execute cycle does the processor test for an interrupt?
Why do interrupts need priorities?
What is meant by partitioning main memory?
What is a buffer?
What is scheduling?
Name the four broad categories of interrupt.
Why is the current instruction completed before an interrupt is serviced?
Which kind of interrupt is normally given the highest priority?
Give two reasons main memory is partitioned.
Why is data transfer between processor and peripheral a problem?
Why is a buffer needed between a processor and a printer?
What is high level scheduling?
Name the three basic states of a process.
Give two examples of a hardware failure interrupt.
Describe what happens immediately after the processor accepts an interrupt.
State three factors that decide the priority given to an interrupt.
Explain the difference between fixed and variable partitioning.
What is programmed input and output?
Where is a printer buffer usually located?
State three aims of a scheduler.
What does it mean for a process to be running?
Take Interrupts, Memory Management and Scheduling further
The same content, four other ways.
Commonly confused
Pairs that lose marks when they are blurred together.
Buffer vs Cache
Buffer: holding data in transit between devices of different speed. Cache: holding copies of data likely to be needed again.
Time-slicing vs Priority scheduling
Time-slicing: sharing the processor by the clock. Priority scheduling: choosing by importance, and most systems combine the two.
Masking vs Priority
Masking: disabling an interrupt entirely for a time. Priority: only deciding the order in which pending interrupts are served.
Questions from this topic
Each one with the model answer underneath.
- 1
What is an interrupt?
Model answer
An interrupt is a signal sent to the processor asking it to suspend its current work. The processor deals with the event and then resumes what it was doing.
- 2
Name the four broad categories of interrupt.
Model answer
The four categories are hardware failure, program error, input or output, and timer interrupts. Each category names the source of the signal rather than its urgency.
- 3
Give two examples of a hardware failure interrupt.
Model answer
A failure of the power supply raises a hardware interrupt. A memory parity error raises a second kind.
- 4
Give two events that generate an input or output interrupt.
Model answer
A printer signalling that it has run out of paper generates an input or output interrupt. A disc drive reporting a completed transfer does the same.
- 5
What is a timer interrupt used for?
Model answer
A timer interrupt is generated at fixed intervals by a hardware clock. The operating system uses it to end the time slice of the running process.
- 6
Give three program errors that raise an interrupt.
Model answer
An attempt to divide by zero raises an interrupt. An illegal instruction and an address outside the process's own memory do the same.
What is inside Levo
Six ways to work the same material.
Interrupts, Memory Management and Scheduling revision questions
- What does Interrupts, Memory Management and Scheduling cover in Eduqas A-Level Computer Science?
- 8 subtopics: what causes an interrupt, interrupt handling and the interrupt service routine, interrupt priorities and how they are allocated, partitioning main memory, methods of data transfer between processor and devices, buffers and double buffering, high level scheduling, processor and device allocation and process states, time-slicing, polling and threading. Each one has its own page with questions and model answers.
- How is Interrupts, Memory Management and Scheduling organised?
- By the Eduqas A500QS specification, subtopic by subtopic, so it matches the order you are taught it in.
Every question in Interrupts, Memory Management and Scheduling, on a schedule.
Attempt a question from memory, write the correct version, then attempt it again. Levo records the jump between your first attempt and your last, and brings each question back on the day you are due to forget it.
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