levo

Interrupts, Memory Management and Scheduling

  • 8 subtopics
  • 24 things to know
  • Component 2

What Interrupts, Memory Management and Scheduling covers

Interrupts, Memory Management and Scheduling is examined in Component 2, Computer Architecture, Data, Communication and Applications. It covers what causes an interrupt, interrupt handling and the interrupt service routine, interrupt priorities and how they are allocated, partitioning main memory, methods of data transfer between processor and devices, buffers and double buffering, high level scheduling, processor and device allocation and process states, time-slicing, polling and threading.

Where it is assessed

Component 2

Computer Architecture, Data, Communication and Applications.

Check the Eduqas specification ↗

The 8 subtopics

Each one has its own page.

What you need to know

Answer each one before you reveal it.

Your recallNot started
Process

Why does the speed gap between processor and peripheral matter, and what is programmed input and output?

Process

What puts a process into the blocked state, and what does the scheduler then do?

Key term

What is an interrupt?

Process

When in the fetch-execute cycle does the processor test for an interrupt?

Key term

Why do interrupts need priorities?

Key term

What is meant by partitioning main memory?

Key term

What is a buffer?

Key term

What is scheduling?

Key term

Name the four broad categories of interrupt.

Key term

Why is the current instruction completed before an interrupt is serviced?

Key term

Which kind of interrupt is normally given the highest priority?

Key term

Give two reasons main memory is partitioned.

Process

Why is data transfer between processor and peripheral a problem?

Process

Why is a buffer needed between a processor and a printer?

Key term

What is high level scheduling?

Process

Name the three basic states of a process.

Key term

Give two examples of a hardware failure interrupt.

Process

Describe what happens immediately after the processor accepts an interrupt.

Key term

State three factors that decide the priority given to an interrupt.

Key term

Explain the difference between fixed and variable partitioning.

Key term

What is programmed input and output?

Key term

Where is a printer buffer usually located?

Key term

State three aims of a scheduler.

Process

What does it mean for a process to be running?

Take Interrupts, Memory Management and Scheduling further

The same content, four other ways.

Commonly confused

Pairs that lose marks when they are blurred together.

  • Buffer vs Cache

    Buffer: holding data in transit between devices of different speed. Cache: holding copies of data likely to be needed again.

  • Time-slicing vs Priority scheduling

    Time-slicing: sharing the processor by the clock. Priority scheduling: choosing by importance, and most systems combine the two.

  • Masking vs Priority

    Masking: disabling an interrupt entirely for a time. Priority: only deciding the order in which pending interrupts are served.

Questions from this topic

Each one with the model answer underneath.

  1. 1

    What is an interrupt?

    Model answer

    An interrupt is a signal sent to the processor asking it to suspend its current work. The processor deals with the event and then resumes what it was doing.

  2. 2

    Name the four broad categories of interrupt.

    Model answer

    The four categories are hardware failure, program error, input or output, and timer interrupts. Each category names the source of the signal rather than its urgency.

  3. 3

    Give two examples of a hardware failure interrupt.

    Model answer

    A failure of the power supply raises a hardware interrupt. A memory parity error raises a second kind.

  4. 4

    Give two events that generate an input or output interrupt.

    Model answer

    A printer signalling that it has run out of paper generates an input or output interrupt. A disc drive reporting a completed transfer does the same.

  5. 5

    What is a timer interrupt used for?

    Model answer

    A timer interrupt is generated at fixed intervals by a hardware clock. The operating system uses it to end the time slice of the running process.

  6. 6

    Give three program errors that raise an interrupt.

    Model answer

    An attempt to divide by zero raises an interrupt. An illegal instruction and an address outside the process's own memory do the same.

What is inside Levo

Six ways to work the same material.

1Closed book
2Open book
3Closed book

The 3-step method, run for you

Answer cold, learn it, then prove it stuck. Levo tracks the jump between your first attempt and your last.

Data Structures: Arrays, Records and Hash Tables
Stacks, Queues, Linked Lists and Trees
Boolean Logic and Simplification
Algorithms, Pseudo-Code and Programming Constructs

Cram a whole paper in one sitting

Sort every topic into what you know and what you do not, then drill only the weak ones.

KDW to HAT.
decryptsencryptscompresses

Blank Blitz makes facts automatic

Rapid timed gap-fills on the terms and numbers you need to recall without thinking.

AThe two are not the same.
BOpen source refers to the availability of the code.
CMuch open source software is free of charge.

Build It gets the exam shape right

Assemble a full-mark answer from its marking points, in the order an examiner wants them.

Backup means the copy of the data.
TrueFalse

Test It catches misconceptions

Spot the fault in a statement. The traps are the mistakes students actually make.

721941163128510

Brain Breaks between sessions

Short focus games to reset attention, so the next set lands better than the last.

Interrupts, Memory Management and Scheduling revision questions

What does Interrupts, Memory Management and Scheduling cover in Eduqas A-Level Computer Science?
8 subtopics: what causes an interrupt, interrupt handling and the interrupt service routine, interrupt priorities and how they are allocated, partitioning main memory, methods of data transfer between processor and devices, buffers and double buffering, high level scheduling, processor and device allocation and process states, time-slicing, polling and threading. Each one has its own page with questions and model answers.
How is Interrupts, Memory Management and Scheduling organised?
By the Eduqas A500QS specification, subtopic by subtopic, so it matches the order you are taught it in.

Every question in Interrupts, Memory Management and Scheduling, on a schedule.

Attempt a question from memory, write the correct version, then attempt it again. Levo records the jump between your first attempt and your last, and brings each question back on the day you are due to forget it.

Or £46 a year, about £3.83 a month. Cancel anytime.